1. Field of the Invention
This invention relates to an alignment apparatus, and more particularly to an alignment apparatus whereby, for example, a mask and a wafer for producing a semiconductor circuit element may be aligned at points on the mask and wafer within a predetermined allowable error and with good operability.
2. Description of the Prior Art
Usually, a mask is supported by a fixed mask carrier and a wafer is supported by a wafer carrier which is parallel-movable in the directions x, y and .theta. with respect to the mask carrier. The mask and wafer are provided with respective alignment marks and by photoelectrically scanning these alignment marks along a predetermined scanning line, the positional relation between the standard point on the mask and a point on the wafer corresponding to the standard point on the mask is measured and, when the point on the wafer is without the allowable error range relative to the standard point on the mask, the wafer carrier is moved in a plane by driving x, y and .theta. motors, thereby effecting the alignment within the aforementioned allowable error range.
Alignment marks are usually provided at two locations on the mask and wafer along a predetermined standard line. The two locations are usually situated at an interval so as to be symmetrical with respect to the centers of the mask and wafer.
Whether or not the alignment between the standard point on the mask and the corresponding point on the wafer is within an allowable error range is discriminated by a circuit for discriminating a relative position signal provided by a photoelectric output. This discrimination circuit usually determines whether or not the corresponding point on the wafer lies within a square whose two sides are parallel to the direction of the standard line having the standard point of the mask as the center or within a circular area.
However, where the area is set to a square whose two sides are parallel to the direction of the standard line or to a circle, it is sometimes the case that a certain point on the mask and wafer, particularly, the vertex position with respect to the direction of arrangement of the alignment marks is not within the allowable error range.
This will be described by reference to FIGS. 1 and 2 of the accompanying drawings.
FIG. 1 illustrates the case where the allowable area is a square. In FIG. 1, the mask 1 and the wafer 2 are shown as being overlapped, and the following description will be made with respect to a case where the mask is fixed and the wafer is movable. Designated by 3 and 4 are standard points provided at the opposite ends of the standard line on the mask 1 (the x-axis having the center of the mask 1 as the origin) and equidistantly with respect to the origin. Designated by 5 and 6 are square allowable regions with the standard points 3 and 4 as the centers and having predetermined areas. Accordingly, points 7 and 8 on the wafer are aligned so as to be positioned within these regions 5 and 6.
Assume that the points 7 and 8 on the wafer are aligned as shown. In this case, the points on a circular circumference having the centers of the mask 1 and wafer 1 as the centers are designated at 9 to 14. That is, 9, 10 and 11 are the points on the circular circumference containing the standard points 3 and 4 on the mask 1 and whereat the angles formed with the x-axis of the mask are 30.degree., 45.degree. and 90.degree., respectively, and these points form the standard points at the respective locations. Also, 12, 13 and 14 are the points on the circular circumference containing the points 7 and 8 on the wafer 2 and when the points 7 and 8 on the wafer are completely coincident with the standard points 3 and 4 on the mask 1, these points 12, 13 and 14 are coincident with the points 9, 10 and 11 on the mask 1. However, when the points 5 and 6 on the wafer are made coincident with the standard points 3 and 4 on the mask 1 within the allowable error regions 5 and 6, the points 9, 10 and 11 lie within the regions 15, 16 and 17. Therefore, these regions 15, 16 and 17 are larger than the regions 5 and 6 and accordingly, there is a possibility that the points 12, 13 and 14 are deviated beyond the allowable amount of deviation with respect to the points 9, 10 and 11 on the mask. As a matter of course, the greater the angles, the greater the amount of deviation.
A similar situation occurs when the allowable regions 5 and 6 are in the form of circles centered at points 3 and 4, as shown in FIG. 2.
In order that each point on the mask 1 and the wafer 2 may be aligned in an allowable range, the allowable range may be set in the portion in which the amount of deviation is greatest, namely, in the portion in which said angle is greatest. However, where such method is adopted, the areas of the allowable regions 5 and 6 on the standard axis will become small. This will in turn mean an increased difficulty an aligning work.